M58PR256LE datasheet(54/119 Pages) STMICROELECTRONICS

部件名	M58PR256LE

功能描述	256-Mbit, 512-Mbit or 1-Gbit (횞 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories

PDF	119 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

54 / 119 page

Configuration Register

M58PR256LE, M58PR512LE, M58PR001LE

54/119

Figure 6.

X latency and data output configuration example

The settings shown are X latency = 4. tQVK_CPU is the data setup time required by the system CPU.

Table 17.

Burst type definition

Start address

8 words

16 words

Continuous burst

0-1-2-3-4-5-6-7

0-1-2-3-4-5-6-7-8-9-10-11-12-13-14-15

0-1-2-3-4-5-6...

1-2-3-4-5-6-7-0

1-2-3-4-5-6-7-8-9-10-11-12-13-14-15-0

1-2-3-4-5-6-7...

2-3-4-5-6-7-0-1

2-3-4-5-6-7-8-9-10-11-12-13-14-15-0-1

2-3-4-5-6-7-8...

3-4-5-6-7-0-1-2

3-4-5-6-7-8-9-10-11-12-13-14-15-0-1-2

3-4-5-6-7-8-9...

...

7-0-1-2-3-4-5-6

7-8-9-10-11-12-13-14-15-0-1-2-3-4-5-6

7-8-9-10-11-12-13...

...

12-13-14-15-8-9-10-11

12-13-14-15-0-1-2-3-4-5-6-7-8-9-10-11

12-13-14-15-16-17...

13-14-15-8-9-10-11-12

13-14-15-0-1-2-3-4-5-6-7-8-9-10-11-12

13-14-15-16-17-18...

14-15-8-9-10-11-12-13

14-15-0-1-2-3-4-5-6-7-8-9-10-11-12-13

14-15-16-17-18-19...

15-8-9-10-11-12-13-14

15-0-1-2-3-4-5-6-7-8-9-10-11-12-13-14

15-16-17-18-19-20...

AI08904b

Amax-A0

VALID ADDRESS

DQ15-DQ0

VALID DATA

X-latency

VALID DATA

1st cycle

2nd cycle

3rd cycle

4th cycle

tKHKH

tQVK_CPU

tKHQV

M58PR256LE 数据表(PDF) 54 Page - STMicroelectronics

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