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M58PR256LE 数据表(PDF) 40 Page - STMicroelectronics |
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M58PR256LE 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 119 page  Command interface M58PR256LE, M58PR512LE, M58PR001LE 40/119 Figure 4. Protection Register memory map Table 11. Protection Register locks Lock Description Number Address Bits Lock 1 80h Bit 0 Preprogrammed to protect unique device number, address 81h to 84h in PR0 Bit 1 Protects 64 bits of OTP area, address 85h to 88h in PR0 Bits 2 to 15 Reserved Lock 2 89h Bit 0 Protects 128 bits of OTP area PR1 Bit 1 Protects 128 bits of OTP area PR2 Bit 2 Protects 128 bits of OTP area PR3 Bit 13 Protects 128 bits of OTP area PR14 Bit 14 Protects 128 bits of OTP area PR15 Bit 15 Protects 128 bits of OTP area PR16 AI07563 User Programmable OTP Unique device number Protection Register Lock 1 0 88h 88h 85h 84h 81h 80h User Programmable OTP PROTECTION REGISTERS User Programmable OTP 10 43 2 975 13 12 10 11 8 6 14 15 PR1 PR16 PR0 89h 8Ah 91h 102h 109h |
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