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M58PR256LE 数据表(PDF) 75 Page - STMicroelectronics

部件名 M58PR256LE
功能描述  256-Mbit, 512-Mbit or 1-Gbit (횞 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories
PDF  119 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M58PR256LE 数据表(HTML) 75 Page - STMicroelectronics

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M58PR256LE, M58PR512LE, M58PR001LE
DC and AC parameters
75/119
Table 29.
Asynchronous read AC characteristics
Symbol
Alt
Parameter
108 MHz 66 MHz Unit
tAVAV
tRC
Address Valid to Next Address Valid
Min
96
96
ns
tAVQV
tACC
Address Valid to Output Valid (random)
Max
96
96
ns
tAVQV1
tPAGE
Address Valid to Output Valid (page)
Max
20
25
ns
tAXQX
(1)
1.
Sampled only, not 100% tested.
tOH
Address Transition to Output transition
Min
0
0
ns
tELTV
Chip Enable Low to Wait Valid
Max
14
14
ns
tELQV
(2)
2.
G may be delayed by up to tELQV - tGLQV after the falling edge of E without increasing tELQV.
tCE
Chip Enable Low to Output Valid
Max
96
96
ns
tELQX
(1)
tLZ
Chip Enable Low to Output transition
Min
0
0
ns
tEHTZ
Chip Enable High to Wait Hi-Z
Max
9
14
ns
tEHQX
(1)
tOH
Chip Enable High to Output transition
Min
0
0
ns
tEHQZ
(1)
tHZ
Chip Enable High to Output Hi-Z
Max
9
14
ns
tGLQV
(2)
tOE
Output Enable Low to Output Valid
Max
20
20
ns
tGLQX
(1)
tOLZ
Output Enable Low to Output transition
Min
0
0
ns
tGLTV
Output Enable Low to Wait Valid
Max
7
11
ns
tGHQX
(1)
tOH
Output Enable High to Output transition
Min
0
0
ns
tGHQZ
(1)
tDF
Output Enable High to Output Hi-Z
Max
9
14
ns
tGHTZ
Output Enable High to Wait Hi-Z
Max
9
17
ns
tAVLH
tAVADVH Address Valid to Latch Enable High
Min
5
5
ns
tELLH
tELADVH Chip Enable Low to Latch Enable High
Min
9
10
ns
tLHAX
tADVHAX Latch Enable High to Address transition
Min
5
5
ns
tLLLH
tADVLADVH Latch Enable Pulse width
Min
7
7
ns
tLLQV
tADVLQV
Latch Enable Low to Output Valid
(random)
Max
96
96
ns



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