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M58PR256LE 数据表(PDF) 96 Page - STMicroelectronics |
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M58PR256LE 数据表(HTML) 96 Page - STMicroelectronics |
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96 / 119 page ![]() Common Flash interface M58PR256LE, M58PR512LE, M58PR001LE 96/119 Table 46. Primary algorithm-specific extended query table Offset Data Description Value (P)h = 10Ah 0050h Primary algorithm extended query table unique ASCII string “PRI” "P" 0052h "R" 0049h "I" (P+3)h =10Dh 0031h Major version number, ASCII "1" (P+4)h = 10Eh 0034h Minor version number, ASCII "4" (P+5)h = 10Fh 00E6h Extended query table contents for primary algorithm. Address (P+5)h contains less significant byte (1 = Yes, 0 = No) bit 0 Chip Erase supported bit 1 Erase Suspend supported bit 2 Program Suspend supported bit 3 Legacy Lock/Unlock supported bit 4 Queued Erase supported bit 5 Instant individual block locking supported bit 6 Protection bits supported bit 7 Page mode read supported bit 8 Synchronous read supported bit 9 Simultaneous operation supported bit 10 Extended Flash Array Blocks supported bit 11 to 29 reserved; undefined bits are ‘0’. bit 30 CFI links to follow bit 31 Optional features. If bit 31 is ’1’ then another 31 bit field of optional features follows at the end of the bit-30 field. No Yes Yes No No Yes Yes Yes Yes Yes Yes No No (P+6)h = 110h 0007h (P+7)h = 111h 0000h (P+8)h = 112h 0000h (P+9)h = 113h 0001h Supported functions after suspend Read Array, Read Status Register and CFI query bit 0 Program supported after erase suspend (1 = Yes, 0 = No) bit 7 to 1 Reserved; undefined bits are ‘0’ Yes (P+A)h = 114h 0033h Block protect status Defines which bits in the Block Status Register section of the query are implemented. bit 0 Block protect Status Register lock/unlock bit active (1 = Yes, 0 = No) bit 1 Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No) bit 4 EFA Block protect Status Register Lock/Unlock bit active (1=yes, 2=No) bit 5 EFA Block Lock Status Register Lock-Down bit active (1=yes, 2=No) bit 15 to 6 and 3 to 2 Reserved for future use; undefined bits are ‘0’ Yes Yes Yes Yes (P+B)h = 115h 0000h (P+C)h = 116h 0018h VDD logic supply optimum program/erase voltage (highest performance) bit 7 to 4 HEX value in volts bit 3 to 0 BCD value in 100 mV 1.8 V (P+D)h = 117h 0090h VPP supply optimum program/erase voltage bit 7 to 4 HEX value in volts bit 3 to 0 BCD value in 100 mV 9V |
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