M58PR256LE datasheet(56/119 Pages) STMICROELECTRONICS

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Enhanced Configuration Register

M58PR256LE, M58PR512LE, M58PR001LE

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Enhanced Configuration Register

The ECR (Enhanced Configuration Register)enables the deep power-down mode and

configures the output driver strength. It is set through the command interface using the Set

Enhanced Configuration Register command.

The contents of the ECR can be read by issuing the Read Electronic Signature command,

and then by reading from the bank base address + 06h.

The ECR is volatile: after a reset or a power-down/power-up sequence the register is set to

the default value. The Configuration Register bits are described in Table 18.

8.1

Deep power-down mode bit (ECR15)

The deep power-down mode bit, ECR15, enable the deep power-down mode.

The device can only enter the deep power-down mode from standby, by, in any order,

asserting the DPD pin and setting ECR15 to ‘1’.

When the device is in the deep power-down mode, de-asserting the DPD pin and/or

resetting ECR15 causes the device to revert to standby mode.

8.2

Deep power-down polarity bit (ECR14)

The deep power-down polarity bit sets the polarity of the DPD signal.

When:

●

ECR14 = 0, the DPD signal is active Low (default).

●

ECR14 = 1, the DPD signal is active High.

8.3

Output driver control bits (ECR2-ECR0)

The output driver control bits, ECR0, ECR1 and ECR2, selects the output driver impedance

best suited to the system requirements.

After reset or power-up the output driver control bits are set to the Enhanced Configuration

Ω (30 pF) (default)). Optimum

performance is only achieved if the output driver impedance is properly configured.

Once a configuration has been selected, all data and wait output drivers are set to the same

setting.

Table 18 lists the output driver impedances at VDDQ/2 and the loads that correspond for

each ECR2-ECR0 bit configuration.

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