MPC8360 datasheet(63/112 Pages) FREESCALE

部件名	MPC8360

功能描述	PowerQUICC??II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications

PDF	112 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2

Freescale Semiconductor

HDLC, BISYNC, Transparent, and Synchronous UART

Figure 45 provides the AC test load for the UTOPIA.

Figure 45. UTOPIA AC Test Load

Figure 46 and Figure 47 represent the AC timing from Table 56. Note that although the specifications

generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge

is the active edge.

Figure 46 shows the UTOPIA timing with external clock.

Figure 46. UTOPIA AC Timing (External Clock) Diagram

Figure 47 shows the UTOPIA timing with internal clock.

Figure 47. UTOPIA AC Timing (Internal Clock) Diagram

19 HDLC, BISYNC, Transparent, and Synchronous UART

This section describes the DC and AC electrical specifications for the high level data link control (HDLC),

BiSync, transparent, and synchronous UART protocols of the MPC8360E/58E.

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

UtopiaCLK (input)

tUEIXKH

tUEIVKH

tUEKHOV

Input Signals:

UTOPIA

Output Signals:

UTOPIA

tUEKHOX

UtopiaCLK (output)

tUIIXKH

tUIKHOV

Input Signals:

UTOPIA

Output Signals:

UTOPIA

tUIIVKH

tUIKHOX

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