MPC8360 datasheet(12/112 Pages) FREESCALE

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MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2

Freescale Semiconductor

Electrical Characteristics

2.1.3

Output Driver Characteristics

Table 3 provides information on the characteristics of the output driver strengths. The values are

preliminary estimates.

2.2

Power Sequencing

This section details the power sequencing considerations for the MPC8360E/58E.

2.2.1

Power-Up Sequencing

MPC8360E/58E does not require the core supply voltage (VDD and AVDD) and I/O supply voltages

(GVDD, LVDD, and OVDD) to be applied in any particular order. During the power ramp up, before the

power supplies are stable and if the I/O voltages are supplied before the core voltage, there may be a period

of time that all input and output pins will actively be driven and cause contention and excessive current.

In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core

voltage (VDD) before the I/O voltage (GVDD, LVDD, and OVDD) and assert PORESET before the power

Table 3. Output Drive Capability

Driver Type

Output Impedance (

Ω)

Supply Voltage

Local bus interface utilities signals

OVDD = 3.3 V

PCI signals

PCI output clocks (including PCI_SYNC_OUT)

DDR signal

36 (half strength mode) 1

DDR output impedance values for half strength mode are verified by design and not tested

GVDD = 2.5 V

DDR2 signal

36 (half strength mode) 1

GVDD = 1.8 V

10/100/1000 Ethernet signals

LVDD = 2.5/3.3 V

DUART, system control, I2C, SPI, JTAG

OVDD = 3.3 V

GPIO signals

OVDD = 3.3 V

LVDD = 2.5/3.3 V

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