MPC5200B datasheet(45/72 Pages) FREESCALE

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MPC5200B Data Sheet, Rev. 3

Freescale Semiconductor

Figure 35. Timing Diagram — SPI Slave Mode, Format 1 (CPHA = 1)

1.3.13

MSCAN

The CAN functions are available as RX and TX pins at normal IO pads (I2C1+GPTimer or PSC2). There is no filter for the

WakeUp dominant pulse. Any High-to-Low edge can cause WakeUp, if configured.

1.3.14

I2C

Table 40. I2C Input Timing Specifications—SCL and SDA

Sym

Description

Min

Max

Units

SpecID

Start condition hold time

—

IP-Bus Cycle(1)

1 Inter Peripheral Clock is defined in the MPC5200B User Manual.

A13.1

Clock low time

—

IP-Bus Cycle(1)

A13.2

Data hold time

0.0

—

A13.3

Clock high time

—

IP-Bus Cycle(1)

A13.4

Data setup time

0.0

—

A13.5

Start condition setup time (for repeated start condition

only)

—

IP-Bus Cycle(1)

A13.6

Stop condition setup time

—

IP-Bus Cycle(1)

A13.7

SCK

(CLKPOL=0)

SCK

(CLKPOL=1)

MOSI

Input

MISO

Output

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