R8CSLASH2G datasheet(116/344 Pages) RENESAS

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R8C/2G Group

11. Clock Generation Circuit

Rev.1.00

Apr 04, 2008

Page 96 of 318

REJ09B0387-0100

The clocks generated by the clock generation circuits are described below.

11.1

On-Chip Oscillator Clocks

These clocks are supplied by the on-chip oscillators (high-speed on-chip oscillator and a low-speed on-chip

oscillator). The on-chip oscillator clock is selected by the HRA01 bit in the HRA0 register.

11.1.1

Low-Speed On-Chip Oscillator Clock

The clock generated by the low-speed on-chip oscillator is used as the clock source for the CPU clock,

peripheral function clock, fOCO, and fOCO-S.

After reset, the on-chip oscillator clock generated by the low-speed on-chip oscillator divided by 8 is selected as

the CPU clock.

The frequency of the low-speed on-chip oscillator varies depending on the supply voltage and the operating

ambient temperature. Application products must be designed with sufficient margin to allow for frequency

changes.

11.1.2

High-Speed On-Chip Oscillator Clock

The clock generated by the high-speed on-chip oscillator is used as the clock source for the CPU clock,

peripheral function clock, fOCO, and fOCO-F.

After reset, the on-chip oscillator clock generated by the high-speed on-chip oscillator stops. Oscillation is

started by setting the HRA00 bit in the HRA0 register to 1 (high-speed on-chip oscillator on). The frequency

can be adjusted by registers HRA1 and HRA2.

Furthermore, frequency correction data corresponding to the supply voltage ranges listed below is stored in

registers FRA4 and FRA6. To use separate correction values to match these voltage ranges, transfer them from

• FRA4 register: Stores data for frequency correction corresponding to VCC = 2.7 V to 5.5 V.

(The value is the same as that of the HRA1 register after a reset.)

• FRA6 register: Stores data for frequency correction corresponding to VCC = 2.2 V to 5.5 V.

Since there are differences in the amount of frequency adjustment among the bits in the HRA1 register, make

adjustments by changing the settings of individual bits. Adjust the HRA1 register so that the frequency of the

high-speed on-chip oscillator clock does not exceed the maximum value of the system clock.

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