R8CSLASH2G datasheet(114/344 Pages) RENESAS

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R8C/2G Group

11. Clock Generation Circuit

Rev.1.00

Apr 04, 2008

Page 94 of 318

REJ09B0387-0100

Figure 11.8

VCA2 Register

Voltage Detection Register 2(1)

Symbol

Address

After Reset(5)

VCA2

0032h

Bit Symbol

Bit Name

Function

NOTES:

7. When the VCA20 bit is set to 1 (low consumption enabled), do not set the CM10 bit in the CM1 register to 1 (stop

mode).

Use the VCA20 bit only w hen entering to w ait mode. To set the VCA20 bit, follow the procedure show n in Figure

11.9 Handling Procedure of Internal Pow er Low Consum ption Using VCA20 Bit.

VCA20

Internal pow er low

consumption enable bit(6)

0 : Low consumption disabled

1 : Low consumption enabled(7)

Set the PRC3 bit in the PRCR register to 1 (w rite enabled) before rew riting to the VCA2 register.

To use the voltage monitor 1 interrupt/reset or the VW1C3 bit in the VW1C register, set the VCA26 bit to 1.

After the VCA26 bit is set to 1 from 0, the voltage detection circuit w aits for td(E-A) to elapse before starting

operation.

To use the voltage monitor 2 interrupt/reset or the VCA13 bit in the VCA1 register, set the VCA27 bit to 1.

After the VCA27 bit is set to 1 from 0, the voltage detection circuit w aits for td(E-A) to elapse before starting

operation.

Softw are reset, w atchdog timer reset, voltage monitor 1 reset, and voltage monitor 2 reset do not affect this

To use the voltage monitor 0 reset, set the VCA25 bit to 1.

After the VCA25 bit is set to 1 from 0, the voltage detection circuit w aits for td(E-A) to elapse before starting

operation.

VCA27

Voltage detection 2 enable

bit(4)

0 : Voltage detection 2 circuit disabled

1 : Voltage detection 2 circuit enabled

VCA26

Voltage detection 1 enable

bit(3)

0 : Voltage detection 1 circuit disabled

1 : Voltage detection 1 circuit enabled

000

b3 b2 b1 b0

b7 b6 b5 b4

The LVD0ON bit in the OFS register is

set to 1 and hardw are reset

: 00h

Pow er-on reset, voltage monitor 0 reset

or LVD0ON bit in the OFS register is

set to 0, and hardw are reset

: 00100000b

VCA25

Voltage detection 0 enable

bit(2)

0 : Voltage detection 0 circuit disabled

1 : Voltage detection 0 circuit enabled

—

(b4-b1)

Reserved bits

Set to 0.

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