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R8C/2G 数据表(PDF) 111 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 111 Page - Renesas Technology Corp |
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111 / 344 page ![]() R8C/2G Group 11. Clock Generation Circuit Rev.1.00 Apr 04, 2008 Page 91 of 318 REJ09B0387-0100 Figure 11.4 OCD Register System Clock Select Register(1) Symbol Address After Reset OCD 000Ch 00000100b Bit Symbol Bit Name Function RW NOTES: 1. 2. b7 b6 b5 b4 b3 b2 b1 b0 000 — (b1-b0) — Nothing is assigned. If necessary, set to 0. When read, the content is 0. Nothing is assigned. If necessary, set to 0. When read, the content is 0. — OCD2 System clock select bit 0 : Selects XCIN clock 1 : Selects on-chip oscillator clock(2) RW Nothing is assigned. If necessary, set to 0. When read, the content is 0. — (b3) — The CM14 in the CM1 register bit is set to 0 (low -speed on-chip oscillator on) if the OCD2 bit is set to 1 (on-chip oscillator clock selected). Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting to the OCD register. — (b6-b4) Reserved bits Set to 0. RW — (b7) |
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