R8CSLASH2G datasheet(144/344 Pages) RENESAS

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R8C/2G Group

13. Interrupts

Rev.1.00

Apr 04, 2008

Page 124 of 318

REJ09B0387-0100

13.2.2

INTi Input Filter (i = 0, 1, 2, 4)

The INTi input contains a digital filter. The sampling clock is selected by bits INTiF1 to INTiF0 in registers

INTF and INTF2. The IR bit in the INTiIC register is set to 1 (interrupt requested) when the INTi level is

sampled for every sampling clock and the sampled input level matches three times.

Figure 13.15 shows the Configuration of INTi Input Filter. Figure 13.16 shows an Operating Example of INTi

Input Filter.

Figure 13.15

Configuration of INTi Input Filter

Figure 13.16

Operating Example of INTi Input Filter

INTiF0, INTiF1: Bits in registers INTF and INTF2

INTiEN, INTiPL: Bits in registers INTEN and INTEN2

i = 0, 1, 2, 4

= 01b

INTi

Port direction

Sampling clock

Digital filter

(input level

matches 3x)

INTi interrupt

= 10b

= 11b

f32

INTiF1 to INTiF0

INTiEN

Other than

INTiF1 to INTiF0

= 00b

INTiPL = 0

INTiPL = 1

NOTE:

1. INT0: Port P4_5 direction register

INT1: Port P1_5 direction register when using the P1_5 pin,

Port P1_7 direction register when using the P1_7 pin,

Port P3_6 direction register when using the P3_6 pin

INT2: Port P3_2 direction register

INT4: Port P0_6 direction register

Both edges

detection

circuit

INTi input

Sampling

timing

IR bit in

INTiIC register

Set to 0 by a program

NOTE:

1. This is an operation example when bits INTiF1 to INTiF0 in registers INTF and INTF2 are set to 01b, 10b, or 11b

(passing digital filter).

i = 0, 1, 2, 4

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