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R8C/2G 数据表(PDF) 166 Page - Renesas Technology Corp

部件名 R8C/2G
功能描述  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  344 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R8C/2G 数据表(HTML) 166 Page - Renesas Technology Corp

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R8C/2G Group
17. Timers
Rev.1.00
Apr 04, 2008
Page 146 of 318
REJ09B0387-0100
Figure 17.2
Registers TRACR and TRAIOC
Timer RA Control Register(4)
Symbol
Address
After Reset
TRACR
0100h
00h
Bit Symbol
Bit Name
Function
RW
NOTES:
1.
2.
3.
4.
5.
Timer RA count start bit(1)
Timer RA count forcible stop
bit(2)
In pulse w idth measurement mode and pulse period measurement mode, use the MOV instruction to set the TRACR
register. If it is necessary to avoid changing the values of bits TEDGF and TUNDF, w rite 1 to them.
Set to 0 in timer mode, pulse output mode, and event counter mode.
Bits TEDGF and TUNDF can be set to 0 by w riting 0 to these bits by a program. How ever, their value remains
unchanged w hen 1 is w ritten.
TUNDF
When the TSTOP bit is set to 1, bits TSTART and TCSTF and registers TRAPRE and TRA are set to the values after a
reset.
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Refer to 17.1.6 Notes on Timer RA.
—
(b7-b6)
b7 b6 b5 b4 b3 b2
When this bit is set to 1, the count is forcibly
stopped. When read, its content is 0.
—
(b3)
b1 b0
—
—
RW
TEDGF
0 : Active edge not received
1 : Active edge received
(end of measurement period)
Active edge judgment
flag(3, 5)
Timer RA underflow flag(3, 5)
0 : No underflow
1 : Underflow
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
RW
TCSTF
RW
RW
RO
TSTART
0 : Count stops
1 : During count
0 : Count stops
1 : Count starts
Timer RA count status flag(1)
TSTOP
Timer RA I/O Control Register
Symbol
Address
After Reset
TRAIOC
0101h
00h
Bit Symbol
Bit Name
Function
RW
INT1
_____
/TRAIO select bit
RW
TIPF0
RW
TOENA
RW
TRAIO input filter select bits
TIPF1
Function varies depending on operating mode.
—
TEDGSEL
RW
TOPCR
RW
TRAIO polarity sw itch bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
—
(b7-b6)
TRAIO output control bit
TRAO output enable bit
b7 b6 b5 b4 b3 b2
TIOSEL
b1 b0



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