R8CSLASH2G datasheet(185/344 Pages) RENESAS

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R8C/2G Group

17. Timers

Rev.1.00

Apr 04, 2008

Page 165 of 318

REJ09B0387-0100

17.2.1

Timer Mode

In timer mode, a count source which is internally generated or timer RA underflows are counted (refer to Table

17.7 Timer Mode Specifications). Registers TRBOCR and TRBSC are not used in timer mode.

Figure 17.16 shows TRBIOC Register in Timer Mode.

Figure 17.16

TRBIOC Register in Timer Mode

Table 17.7

Timer Mode Specifications

Item

Specification

Count sources

f1, f2, f8, timer RA underflow

Count operations

• Decrement

• When the timer underflows, it reloads the reload register contents before the

count continues (when timer RB underflows, the contents of timer RB primary

reload register is reloaded).

Divide ratio

1/(n+1)(m+1)

n: setting value in TRBPRE register, m: setting value in TRBPR register

Count start condition

1 (count starts) is written to the TSTART bit in the TRBCR register.

Count stop conditions

• 0 (count stops) is written to the TSTART bit in the TRBCR register.

• 1 (count forcibly stop) is written to the TSTOP bit in the TRBCR register.

Interrupt request

generation timing

When timer RB underflows [timer RB interrupt].

TRBO pin function

Programmable I/O port

INT0 pin function

Programmable I/O port or INT0 interrupt input

Read from timer

The count value can be read out by reading registers TRBPR and TRBPRE.

Write to timer

• When registers TRBPRE and TRBPR are written while the count is stopped,

values are written to both the reload register and counter.

• When registers TRBPRE and TRBPR are written to while count operation is in

progress:

If the TWRC bit in the TRBMR register is set to 0, the value is written to both

the reload register and the counter.

If the TWRC bit is set to 1, the value is written to the reload register only.

(Refer to 17.2.1.1 Timer Write Control during Count Operation.)

Timer RB I/O Control Register

Symbol

Address

After Reset

TRBIOC

010Ah

00h

Bit Symbol

Bit Name

Function

One-shot trigger control bit

Set to 0 in timer mode.

TOPL

Timer RB output level select

bit

Timer RB output sw itch bit

b7 b6 b5 b4 b3 b2

INOSEG

b1 b0

INOSTG

TOCNT

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

One-shot trigger polarity

select bit

—

(b7-b4)

—

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