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R8C/2G 数据表(PDF) 187 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 187 Page - Renesas Technology Corp |
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187 / 344 page  R8C/2G Group 17. Timers Rev.1.00 Apr 04, 2008 Page 167 of 318 REJ09B0387-0100 Figure 17.17 Operating Example of Timer RB when Counter Value is Rewritten during Count Operation Count source Reloads register of timer RB prescaler IR bit in TRBIC register 0 Counter of timer RB prescaler Reloads register of timer RB Counter of timer RB Set 01h to the TRBPRE register and 25h to the TRBPR register by a program. After writing, the reload register is written with the first count source. Reload with the second count source Reload on underflow After writing, the reload register is written on the first underflow. Reload on the second underflow The IR bit remains unchanged until underflow is generated by a new value. When the TWRC bit is set to 0 (write to reload register and counter) Count source Reloads register of timer RB prescaler IR bit in TRBIC register Counter of timer RB prescaler Reloads register of timer RB Counter of timer RB Set 01h to the TRBPRE register and 25h to the TRBPR register by a program. After writing, the reload register is written with the first count source. Reload on underflow After writing, the reload register is written on the first underflow. Reload on underflow Only the prescaler values are updated, extending the duration until timer RB underflow. When the TWRC bit is set to 1 (write to reload register only) 05h 04h 03h 02h 01h 00h 01h 00h 01h 00h 06h 01h 00h 01h 03h 00h 02h 01h 25h New value (25h) Previous value New value (01h) Previous value New value (01h) Previous value 05h 04h 01h 00h 01h 00h 01h 00h 01h 00h 06h New value (25h) Previous value 03h 24h 02h 25h The above applies under the following conditions. Both bits TSTART and TCSTF in the TRBCR register are set to 1 (During count). 0 |
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