R8CSLASH2G datasheet(291/344 Pages) RENESAS

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R8C/2G Group

21. Reducing Power Consumption

Rev.1.00

Apr 04, 2008

Page 271 of 318

REJ09B0387-0100

21. Reducing Power Consumption

21.1

Overview

This chapter describes key points and processing methods for reducing power consumption.

21.2

Key Points and Processing Methods for Reducing Power Consumption

Key points for reducing power consumption are shown below. They should be referred to when designing a system

or creating a program.

21.2.1

Voltage Detection Circuit

When voltage monitor 1 and comparator 1 are not used, set the VCA26 bit in the VCA2 register to 0 (voltage

detection 1 circuit disabled). When voltage monitor 2 and comparator 2 are not used, set the VCA27 bit in the

VCA2 register to 0 (voltage detection 2 circuit disabled).

If the power-on reset and voltage monitor 0 reset are not used, set the VCA25 bit in the VCA2 register to 0

(voltage detection 0 circuit disabled).

21.2.2

Ports

Even after the MCU enters wait mode or stop mode, the states of the I/O ports are retained. Current flows into

the output ports in the active state, and shoot-through current flows into the input ports in the high-impedance

state. Unnecessary ports should be set to input and fixed to a stable electric potential before the MCU enters

wait mode or stop mode.

21.2.3

Clocks

Power consumption generally depends on the number of the operating clocks and their frequencies. The fewer

the number of operating clocks or the lower their frequencies, the more power consumption decreases.

Unnecessary clocks should be stopped accordingly.

Stopping low-speed on-chip oscillator oscillation: CM14 bit in CM1 register

Stopping high-speed on-chip oscillator oscillation: HRA00 bit in HRA0 register

21.2.4

Selecting Oscillation Drive Capacity

Set the drive capacity of the XCIN clock oscillation circuit to “LOW”. Confirm that the circuit oscillates stably

while it is in the “LOW” state.

Selecting XCIN-XCOUT drive capacity: CM03 bit in CM0 register

21.2.5

Wait Mode, Stop Mode

Power consumption can be reduced in wait mode and stop mode. Refer to 11.4 Power Control for details.

21.2.6

Stopping Peripheral Function Clocks

If the peripheral function f1, f2, f4, f8, and f32 clocks are not necessary in wait mode, set the CM02 bit in the

CM0 register to 1 (peripheral function clock stops in wait mode). This will stop the f1, f2, f4, f8, and f32 clocks

in wait mode.

21.2.7

Timers

If timer RA is not used, set the TCKCUT bit in the TRAMR register to 1 (count source cutoff).

If timer RB is not used, set the TCKCUT bit in the TRBMR register to 1 (count source cutoff).

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