H8SSLASH2225 datasheet(215/1071 Pages) RENESAS

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Section 5 Interrupt Controller

Rev. 5.00 Aug 08, 2006 page 129 of 982

REJ09B0054-0500

5.2

Input/Output Pins

Table 5.1 summarizes the pins of the interrupt controller.

Table 5.1

Pin Configuration

Name

I/O

Function

NMI

Input

Nonmaskable external interrupt.

Rising or falling edge can be selected.

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

IRQ2

IRQ1

IRQ0

Input

Maskable external interrupts.

Rising, falling, or both edges, or level sensing can be selected.

5.3

The interrupt controller has the following registers. For the system control register, see section

3.2.2, System Control Register (SYSCR).

• System control register (SYSCR)

• IRQ sense control register H (ISCRH)

• IRQ sense control register L (ISCRL)

• IRQ enable register (IER)

• IRQ status register (ISR)

• Interrupt priority register A (IPRA)

• Interrupt priority register B (IPRB)

• Interrupt priority register C (IPRC)

• Interrupt priority register D (IPRD)

• Interrupt priority register E (IPRE)

• Interrupt priority register F (IPRF)

• Interrupt priority register G (IPRG)

• Interrupt priority register H (IPRH)

• Interrupt priority register I (IPRI)

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