H8SSLASH2225 datasheet(212/1071 Pages) RENESAS

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Section 4 Exception Handling

Rev. 5.00 Aug 08, 2006 page 126 of 982

REJ09B0054-0500

4.8

Usage Note

When accessing word data or longword data, this LSI assumes that the lowest address bit is 0. The

stack should always be accessed by word transfer instruction or longword transfer instruction, and

the value of the stack pointer (SP, ER7) should always be kept even. Use the following

instructions to save registers:

PUSH.W

(or MOV.W Rn, @-SP)

PUSH.L

ERn

(or MOV.L ERn, @-SP)

Use the following instructions to restore registers:

POP.W

(or MOV.W @SP+, Rn)

POP.L

ERn

(or MOV.L @SP+, ERn)

Setting SP to an odd value may lead to a malfunction. Figure 4.3 shows an example of what

happens when the SP value is odd.

H'FFFEFA

H'FFFEFB

H'FFFEFC

H'FFFEFD

H'FFFEFF

R1L

CCR

CCR:

PC:

R1L:

SP:

Condition code register

Program counter

General register R1L

Stack pointer

TRAP instruction executed

SP set to H'FFFEFF

Data saved above SP

MOV.B R1L, @-ER7 executed

Contents of CCR lost

Legend:

Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode.

Figure 4.3 Operation When SP Value Is Odd

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