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数据搜索系统，热门电子元器件搜索 |
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ST7263BEx 数据表(PDF) 128 Page - STMicroelectronics |
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ST7263BEx 数据表(HTML) 128 Page - STMicroelectronics |
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128 / 186 page  On-chip peripherals ST7263Bxx 128/186 Doc ID 7516 Rev 8 11.6.5 Interrupts None 11.6.6 Register description Control/Status register (CSR) Reset value: 0000 0000 (00h) 7 0 COCO 0 ADON 0 CH3 CH2 CH1 CH0 Read/write 7 COCO Conversion Complete This bit is set by hardware. It is cleared by software reading the result in the DR register or writing to the CSR register. 0: Conversion is not complete 1: Conversion can be read from the DR register 6 Reserved. must always be cleared. 5 ADON A/D Converter On This bit is set and cleared by software. 0: A/D converter is switched off 1: A/D converter is switched on 4 Reserved. must always be cleared. [3:0] CH[3:0] Channel Selection These bits are set and cleared by software. They select the analog input to convert (see Table 45). Table 45. Channel selection Channel pin(1) 1. The number of pins AND the channel selection varies according to the device. Refer to the device pinout. CH3(2) CH2 CH1 CH0 AIN0 0 0 0 0 AIN1 0 0 0 1 AIN2 0 0 1 0 AIN3 0 0 1 1 AIN4 0 1 0 0 AIN5 0 1 0 1 AIN6 0 1 1 0 AIN7 0 1 1 1 AIN8 1 0 0 0 AIN9 1 0 0 1 AIN10 1 0 1 0 AIN11 1 0 1 1 |
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