ST7263BEx datasheet(156/186 Pages) STMICROELECTRONICS

156 / 186 page

Electrical characteristics

ST7263Bxx

156/186

Doc ID 7516 Rev 8

Figure 72.

|VDD-VOH| @ IIO=10 mA (high current)

13.9

Control pin characteristics

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

|Vdd - Voh| (V) at Iio=-10mA

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

4.2

4.4

4.6

4.8

5.2

5.4

Vdd (V)

ai17706

Table 72.

Asynchronous RESET pin

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIH

Input high level voltage

0.7xVDD

-VDD

VIL

Input low voltage

VSS

0.3xVD

Vhys

Schmitt trigger voltage

hysteresis(1)

400

VOL

Output low level voltage(2)

VDD=5 V

IIO=5 mA

0.8

IIO=7.5 mA

1.3

RON

Weak pull-up equivalent resistor

(3)

VIN=VSS

VDD=5 V

100

tw(RSTL)out Generated reset pulse duration

External pin or

internal reset sources

1/fSFOSC

µs

th(RSTL)in External reset pulse hold time

(4)

µs

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

The IIO current sunk must always respect the absolute maximum rating specified in Section 13.2 and the sum of IIO (I/O

ports and control pins) must not exceed IVSS.

The RON pull-up equivalent resistor is based on a resistive transistor. This data is based on characterization results, not

tested in production.

To guarantee the reset of the device, a minimum pulse has to be applied to RESET pin. All short pulses applied on RESET

pin with a duration below th(RSTL)in can be ignored.

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