ST7263BEx datasheet(184/186 Pages) STMICROELECTRONICS

184 / 186 page

Revision history

ST7263Bxx

184/186

Doc ID 7516 Rev 8

Revision history

Table 89.

Document revision history

Date

Revision

Changes

27-May-05

New revision created by merging 32K Flash and non-32K Flash

datasheets together. Memory Map, Figure 7, expanded to handle all

devices and memory sizes. Operating conditions with LVD values

modified, Section 13.3.1: Operating conditions with low voltage

detector (LVD).

Supply current characteristics values and notes updated,

Section 13.4: Supply current characteristics. IDD Run and Wait

graphs replaced, Figure 55 and Figure 56 on page 143. Control

timing characteristics modified, Section Table 62.: Control timing

characteristics. Flash memory table notes and tPROG typical value

updated, Section 13.6.1: Flash memory. Notes added for I/O Port

Pin Characteristics table, Section Table 70.: General characteristics.

Note for RPU modified, removing reference to data characterization,

Section Table 70. IPU and RPU graphs added, Figure 61 and

Figure 62 on page 150. Notes updated for USB low speed electrical

characteristics. Output voltage/current graphs added, Figures Figure

63.-Figure 72.Thermal Characteristics added for SO24 and TQFP48

packages, Section 14.2: Thermal characteristics. Important note

added for OPT 3 Option Byte (LVD), Section 15.1: Option byte.

Supported Part Numbers table updated with full sales type codes,

Table 86. Option List updated with all device options.

Important notes updated with ‘USB behavior with LVD disabled’,

Section 16.3: USB behavior with LVD disabled. Clock block diagram

redrawn, Figure 18 on page 36. DFU added to title and features list.

Removed unnecessary notes related to Typical Values (already

mentioned in Section 13.1.2: Typical values) in electrical

characteristic tables sections: Section 13.3.1, Section 13.4,

Section 13.6.1, Section Table 70., Section Table 72. and

Section 13.11. Added note for max values in ADC Accuracy,

Section 13.11. Static Latch Up (LU) class tested only for TA=25°C,

Section : Static latchup (LU)

19-Sep-05

Flash memory minimum data retention increased to 40 years,

Section 13.6.1: Flash memory

AF bit text modified concerning SCL, I2C chapter Section 11.5.7:

Reference made to the Flash Programming Reference Manual for

Flash timing values

Reset pulse generated by WDG changed to 30 µs, Section 11.1:

Watchdog timer (WDG)

Modified text in Section 11.3: Serial communications interface (SCI),

adding Parity error as an interrupt

Added ECOPACK information in Section 14: Package characteristics

Modified IS value and corresponding note in Section Table 70.:

General characteristics

06-Apr-06

32K and 8K QFN40 Packages added

4K SO24 Package added

TQFP package renamed to LQFP

ST7263BEx 数据表(PDF) 184 Page - STMicroelectronics

ST7263BEx 数据表(HTML) 184 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载