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CYWUSB6953 数据表(PDF) 40 Page - Cypress Semiconductor |
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CYWUSB6953 数据表(HTML) 40 Page - Cypress Semiconductor |
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40 / 68 page ![]() CYRF69103 Document #: 001-07611 Rev *F Page 40 of 68 Bit 7 Reserved Bit 6 see Section 19.2.1 Bit 5 see Section 19.2.2 Bit 4 Reserved Bit 3 Reserved Bit 2 Reserved Bit 1 0 = disables the 5K ohm pull up resistors 1 = enables 5K ohm pull up resistors for both P1.0 and P1.1 (this is not compatible with USB) Bit 7 Reserved Bit 6 see Section 19.2.1 Bit 5 see Section 19.2.2 Bit 4 Reserved Bit 3 Reserved Bit 2 see Section 19.2.5 Bit 1 Reserved Bit 0 see Section 19.2.7 Table 19-7. P1.0 Configuration (P10CR) [0x0D] [R/W] Bit # 7 6 5 4 3 2 1 0 Field Reserved Int Enable Int Act Low Reserved Reserved Reserved 5K pullup Enable Output enable Read/Write R/W R/W R/W - - - R/W R/W Default 000 0 000 0 This register controls the operation of the P1.0 pin. Note The P1.0 is an open drain only output. It can actively drive a signal low, but cannot actively drive a signal high. Bit 0 This bit enables the output on P1.0. This bit must be cleared in sleep mode. Table 19-8. P1.1 Configuration (P11CR) [0x0E] [R/W] Bit # 7 6 5 4 3 2 1 0 Field Reserved Int Enable Int Act Low Reserved Open Drain Reserved Output Enable Read/Write – R/W R/W – –R/W – R/W Default 00000000 This register controls the operation of the P1.1 pin. The pull up resistor on this pin is enabled by the P10CR Register. Note There is no 2 mA sourcing capability on this pin. The pin can only sink 5 mA at VOL3 section. [+] Feedback |
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