CYWUSB6953_10 datasheet(20/68 Pages) CYPRESS

20 / 68 page

CYRF69103

Document #: 001-07611 Rev *F

Page 20 of 68

14.2 Data Memory Organization

The MCU function provides up to 256 bytes of data RAM.

Figure 14-2. Data Memory Organization

14.3 Flash

This section describes the Flash block of the CYRF69103. Much

of the user visible Flash functionality, including programming and

security, are implemented in the M8C Supervisory Read Only

Memory (SROM). CYRF69103 Flash has an endurance of 1000

cycles and 10-year data retention.

14.3.1 Flash Programming and Security

All Flash programming is performed by code in the SROM. The

registers that control the Flash programming are only visible to

the M8C CPU when it is executing out of SROM. This makes it

impossible to read, write, or erase the Flash by bypassing the

security mechanisms implemented in the SROM.

Customer firmware can only program the Flash through SROM

calls. The data or code images can be sourced by way of any

interface with the appropriate support firmware. This type of

programming requires a ‘bootloader’—a piece of firmware

resident on the Flash. For safety reasons, this bootloader must

not be over written during firmware rewrites.

The Flash provides four auxiliary rows that are used to hold Flash

block protection flags, boot time calibration values, configuration

tables, and any device values. The routines for accessing these

auxiliary rows are documented in the SROM section. The

auxiliary rows are not affected by the device erase function.

14.3.2 In-System Programming

CYRF69103 enables this type of in-system programming by

using the P1.0 and P1.1 pins as the serial programming mode

interface. This allows an external controller to cause the

CYRF69103 to enter serial programming mode and then to use

the test queue to issue Flash access functions in the SROM.

14.4 SROM

The SROM holds code that is used to boot the part, calibrate

circuitry, and perform Flash operations (Table 14-1 lists the

SROM functions). The functions of the SROM may be accessed

in normal user code or operating from Flash. The SROM exists

in a separate memory space from user code. The SROM

functions are accessed by executing the Supervisory System

Call instruction (SSC), which has an opcode of 00h. Before

executing the SSC, the M8C’s accumulator needs to be loaded

with the desired SROM function code from Table 14-1.

Undefined functions causes a HALT if called from user code. The

SROM functions are executing code with calls; therefore, the

functions require stack space. With the exception of Reset, all of

the SROM functions have a parameter block in SRAM that must

be configured before executing the SSC. Table 14-2 on page 21

lists all possible parameter block variables. The meaning of each

parameter, with regards to a specific SROM function, is

described later in this section.

after reset

Address

8-bit PSP

0x00

Stack begins here and grows upward

Top of RAM Memory

0xFF

Table 14-1. SROM Function Codes

Function Code

Function Name

Stack Space

00h

SWBootReset

01h

ReadBlock

02h

WriteBlock

03h

EraseBlock

05h

EraseAll

06h

TableRead

07h

CheckSum

[+] Feedback

CYWUSB6953 数据表(PDF) 20 Page - Cypress Semiconductor

CYWUSB6953 数据表(HTML) 20 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载