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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AX2000 数据表(PDF) 249 Page - Microsemi Corporation |
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AX2000 数据表(HTML) 249 Page - Microsemi Corporation |
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249 / 262 page  Axcelerator Family FPGAs Re vi s i on 18 3 - 123 IO75PB1F6 D17 IO76NB1F7 C21 IO76PB1F7 C20 IO79NB1F7 H20 IO79PB1F7 H19 IO80NB1F7 E18 IO80PB1F7 F18 IO81NB1F7 G21 IO81PB1F7 G20 IO82NB1F7 F20 IO82PB1F7 F19 IO85NB1F7 D20* IO85PB1F7 D19* Bank 2 IO86NB2F8 F23 IO86PB2F8 E23 IO87NB2F8 H23 IO87PB2F8 G23 IO88NB2F8 E24 IO88PB2F8 D24 IO89NB2F8 M17* IO89PB2F8 G22* IO91NB2F8 J22 IO91PB2F8 H22 IO92NB2F8 L18 IO92PB2F8 K18 IO96NB2F9 G24 IO96PB2F9 F24 IO97NB2F9 J21 IO97PB2F9 J20 IO98PB2F9 J23 IO99NB2F9 L19 CG624 AX2000 Function Pin Number Note: *Not routed on the same package layer and to adjacent LGA pads as its differential pair complement. Recommended to be used as a single-ended I/O. IO99PB2F9 K19 IO100NB2F9 E25 IO100PB2F9 D25 IO103PB2F9 K20 IO105NB2F9 M19 IO105PB2F9 M18 IO106NB2F9 J24 IO106PB2F9 H24 IO107NB2F10 L23* IO107PB2F10 N16* IO109NB2F10 L22 IO109PB2F10 K22 IO110NB2F10 G25 IO110PB2F10 F25 IO111NB2F10 L21 IO111PB2F10 L20 IO112NB2F10 L24 IO112PB2F10 K24 IO113NB2F10 N17 IO115NB2F10 M20 IO115PB2F10 M21 IO117NB2F10 N19 IO117PB2F10 N18 IO118NB2F11 J25 IO121NB2F11 N24 IO121PB2F11 M24 IO122NB2F11 L25 IO122PB2F11 K25 IO123NB2F11 N22 IO123PB2F11 M22 IO124NB2F11 N23 IO124PB2F11 M23 CG624 AX2000 Function Pin Number Note: *Not routed on the same package layer and to adjacent LGA pads as its differential pair complement. Recommended to be used as a single-ended I/O. IO127NB2F11 P18 IO127PB2F11 P17 IO128NB2F11 N25 IO128PB2F11 M25 Bank 3 IO129NB3F12 N20 IO130PB3F12 P24 IO131NB3F12 P21 IO133NB3F12 P20 IO133PB3F12 P19 IO138NB3F12 R23 IO138PB3F12 P23 IO139NB3F13 R22 IO139PB3F13 P22 IO141NB3F13 R19 IO142NB3F13 R25 IO142PB3F13 P25 IO143PB3F13 R21 IO145NB3F13 T18 IO145PB3F13 R18 IO146NB3F13 T24 IO146PB3F13 R24 IO147NB3F13 T20 IO147PB3F13 R20 IO148NB3F13 U25 IO148PB3F13 T25 IO149NB3F13 T22 IO153NB3F14 U19 IO153PB3F14 T19 IO154NB3F14 Y25 IO154PB3F14 W25 IO157NB3F14 V20 CG624 AX2000 Function Pin Number Note: *Not routed on the same package layer and to adjacent LGA pads as its differential pair complement. Recommended to be used as a single-ended I/O. |
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