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AX2000 数据表(PDF) 58 Page - Microsemi Corporation

部件名 AX2000
功能描述  Axcelerator Family FPGAs
PDF  262 Pages
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制造商  MICROSEMI [Microsemi Corporation]
网页  http://www.microsemi.com
标志 MICROSEMI - Microsemi Corporation

AX2000 数据表(HTML) 58 Page - Microsemi Corporation

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Detailed Specifications
2- 44
R e v i sio n 1 8
Table 2-40 • 3.3 V GTL+ I/O Module
Worst-Case Commercial Conditions VCCA = 1.425 V, VCCI = 3.0 V, TJ = 70°C
–2 Speed
–1 Speed
Std Speed
Units
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
3.3 V GTL+I/O Module Timing
tDP
Input Buffer
1.71
1.95
2.29
ns
tPY
Output Buffer
1.13
1.29
1.52
ns
tICLKQ
Clock-to-Q for the I/O input register
0.67
0.77
0.90
ns
tOCLKQ
Clock-to-Q for the I/O output register and
the I/O enable register
0.67
0.77
0.90
ns
tSUD
Data Input Set-Up
0.23
0.27
0.31
ns
tSUE
Enable Input Set-Up
0.26
0.30
0.35
ns
tHD
Data Input Hold
0.00
0.00
0.00
ns
tHE
Enable Input Hold
0.00
0.00
0.00
ns
tCPWHL
Clock Pulse Width High to Low
0.39
0.39
0.39
ns
tCPWLH
Clock Pulse Width Low to High
0.39
0.39
0.39
ns
tWASYN
Asynchronous Pulse Width
0.37
0.37
0.37
ns
tREASYN
Asynchronous Recovery Time
0.13
0.15
0.17
ns
tHASYN
Asynchronous Removal Time
0.00
0.00
0.00
ns
tCLR
Asynchronous Clear-to-Q
0.23
0.27
0.31
ns
tPRESET
Asynchronous Preset-to-Q
0.23
0.27
0.31
ns



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