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AM79C978VC/W 数据表(PDF) 154 Page - Advanced Micro Devices

部件名 AM79C978VC/W
功能描述  Single-Chip 1/10 Mbps PCI Home Networking Controller
PDF  261 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM79C978VC/W 数据表(HTML) 154 Page - Advanced Micro Devices

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154
Am79C978
will be governed by the LEDOUT
and LEDPOL values.
This bit is always read/write ac-
cessible. LEDDIS is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
12
100E
100 Mbps Enable. When this bit
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C978 controller is
operating at 100 Mbps mode.
This bit is always read/write ac-
cessible. 100E is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
11-10 RES
Reserved locations. Written and
read as zeros.
9
MPSE
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when magic frame
mode is enabled and a magic
frame is detected on the network.
This bit is always read/write ac-
cessible. MPSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
8
FDLSE
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C978
controller is functioning in a Link
Pass state and full-duplex opera-
tion
is
enabled.
When
the
Am79C978 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
This bit is always read/write ac-
cessible. FDLSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
7
PSE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
This bit is always read/write ac-
cessible. LNKSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
This bit is always read/write ac-
cessible. XMTE is set to 1 by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
3
POWER
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this



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