PM0056 datasheet(9/156 Pages) STMICROELECTRONICS

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PM0056

About this document

This document provides the information required for application and system-level software

development. It does not provide information on debug components, features, or operation.

This material is for microcontroller software and hardware engineers, including those who

have no experience of ARM products.

1.1

Typographical conventions

The typographical conventions used in this document are:

1.2

List of abbreviations for registers

The following abbreviations are used in register descriptions:

1.3

About the STM32 Cortex-M3 processor and core peripherals

The Cortex-M3 processor is built on a high-performance processor core, with a 3-stage

pipeline Harvard architecture, making it ideal for demanding embedded applications. The

processor delivers exceptional power efficiency through an efficient instruction set and

extensively optimized design, providing high-end processing hardware including single-

cycle 32x32 multiplication and dedicated hardware division.

italic

Highlights important notes, introduces special terminology, denotes

internal cross-references, and citations.

< and >

Enclose replaceable terms for assembler syntax where they appear

in code or code fragments. For example:

LDRSB<cond> <Rt>, [<Rn>, #<offset>]

read/write (rw)

Software can read and write to these bits.

read-only (r)

Software can only read these bits.

write-only (w)

Software can only write to this bit. Reading the bit returns the reset

value.

read/clear (rc_w1) Software can read as well as clear this bit by writing 1. Writing ‘0’ has

no effect on the bit value.

read/clear (rc_w0) Software can read as well as clear this bit by writing 0. Writing ‘1’ has

no effect on the bit value.

toggle (t)

Software can only toggle this bit by writing ‘1’. Writing ‘0’ has no effect.

Reserved (Res.)

Reserved bit, must be kept at reset value.

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