PM0056 datasheet(13/156 Pages) STMICROELECTRONICS

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PM0056

The Cortex-M3 processor

2.1

Programmers model

This section describes the Cortex-M3 programmers model. In addition to the individual core

for software execution and stacks.

2.1.1

Processor mode and privilege levels for software execution

The processor modes are:

The privilege levels for software execution are:

In Thread mode, the CONTROL register controls whether software execution is privileged or

unprivileged, see CONTROL register on page 21. In Handler mode, software execution is

always privileged.

Only privileged software can write to the CONTROL register to change the privilege level for

software execution in Thread mode. Unprivileged software can use the SVC instruction to

make a supervisor call to transfer control to privileged software.

2.1.2

Stacks

The processor uses a full descending stack. This means the stack pointer indicates the last

stacked item on the stack memory. When the processor pushes a new item onto the stack, it

decrements the stack pointer and then writes the item to the new memory location. The

processor implements two stacks, the main stack and the process stack, with independent

copies of the stack pointer, see Stack pointer on page 15.

Thread mode

Used to execute application software. The processor enters Thread

mode when it comes out of reset.

Handler mode

Used to handle exceptions. The processor returns to Thread mode

when it has finished exception processing.

Unprivileged

The software:

•

Has limited access to the MSR and MRS instructions, and cannot

use the CPS instruction

•

Cannot access the system timer, NVIC, or system control block

•

Might have restricted access to memory or peripherals.

Unprivileged software executes at the unprivileged level.

Privileged

The software can use all the instructions and has access to all

resources.

Privileged software executes at the privileged level.

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