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PM0056 数据表(PDF) 92 Page - STMicroelectronics |
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PM0056 数据表(HTML) 92 Page - STMicroelectronics |
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92 / 156 page  The Cortex-M3 instruction set PM0056 92/156 DocID15491 Rev 5 3.8.5 B, BL, BX, and BLX Branch instructions. Syntax B{cond} label BL{cond} label BX{cond} Rm BLX{cond} Rm where: • ‘B’ is branch (immediate). • ‘BL’ is branch with link (immediate). • ‘BX’ is branch indirect (register). • ‘BLX’ is branch indirect with link (register). • ‘cond’ is an optional condition code, see Conditional execution on page 57. • ‘label’ is a PC-relative expression. See PC-relative expressions on page 56. • ‘Rm’ is a register that indicates an address to branch to. Bit[0] of the value in Rm must be 1, but the address to branch to is created by changing bit[0] to 0. Operation All these instructions cause a branch to label, or to the address indicated in Rm. In addition: • The BL and BLX instructions write the address of the next instruction to LR (the link register, R14). • The BX and BLX instructions cause a UsageFault exception if bit[0] of Rm is 0. B cond label is the only conditional instruction that can be either inside or outside an IT block. All other branch instructions must be conditional inside an IT block, and must be unconditional outside the IT block, see IT on page 94. Table 31 shows the ranges for the various branch instructions. You might have to use the .W suffix to get the maximum branch range. See Instruction width selection on page 59. Table 31. Branch ranges Instruction Branch range B label −16 MB to +16 MB Bcond label (outside IT block) −1 MB to +1 MB Bcond label (inside IT block) −16 MB to +16 MB BL{cond} label −16 MB to +16 MB BX{cond} Rm Any value in register BLX{cond} Rm Any value in register |
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