PM0056 datasheet(23/156 Pages) STMICROELECTRONICS

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PM0056

The Cortex-M3 processor

2.1.6

The Cortex microcontroller software interface standard (CMSIS)

For a Cortex-M3 microcontroller system, the Cortex Microcontroller Software Interface

Standard (CMSIS) defines:

•

A common way to:

–

Access peripheral registers

–

Define exception vectors

•

The names of:

–

The registers of the core peripherals

–

The core exception vectors

•

A device-independent interface for RTOS kernels, including a debug channel

The CMSIS includes address definitions and data structures for the core peripherals in the

Cortex-M3 processor. It also includes optional interfaces for middleware components

comprising a TCP/IP stack and a Flash file system.

CMSIS simplifies software development by enabling the reuse of template code and the

combination of CMSIS-compliant software components from various middleware vendors.

Software vendors can expand the CMSIS to include their peripheral definitions and access

functions for those peripherals.

This document includes the register names defined by the CMSIS, and gives short

descriptions of the CMSIS functions that address the processor core and the core

peripherals.

This document uses the register short names defined by the CMSIS. In a few cases these

differ from the architectural short names that might be used in other documents.

The following sections give more information about the CMSIS:

•

Section 2.5.4: Power management programming hints on page 44

•

Intrinsic functions on page 50

•

The CMSIS mapping of the Cortex-M3 NVIC registers on page 119

•

NVIC programming hints on page 127

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