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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PM0056 数据表(PDF) 103 Page - STMicroelectronics |
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PM0056 数据表(HTML) 103 Page - STMicroelectronics |
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103 / 156 page  DocID15491 Rev 5 103/156 PM0056 The Cortex-M3 instruction set Operation SEV is a hint instruction that causes an event to be signaled to all processors within a multiprocessor system. It also sets the local event register to 1, see Power management on page 42. Condition flags This instruction does not change the flags. Examples SEV ; Send Event 3.9.10 SVC Supervisor Call. Syntax SVC{cond} #imm where: • ‘cond’ is an optional condition code, see Conditional execution on page 57. • ‘imm’ is an expression evaluating to an integer in the range 0-255 (8-bit value). Operation The SVC instruction causes the SVC exception. imm is ignored by the processor. If required, it can be retrieved by the exception handler to determine what service is being requested. Condition flags This instruction does not change the flags. Examples SVC 0x32 ; Supervisor Call (SVC handler can extract the immediate value ; by locating it via the stacked PC) 3.9.11 WFE Wait For Event. Syntax WFE{cond} where: • ‘cond’ is an optional condition code, see Conditional execution on page 57. Operation WFE is a hint instruction. |
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