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TNETX3150 数据表(PDF) 24 Page - Texas Instruments |
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TNETX3150 数据表(HTML) 24 Page - Texas Instruments |
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24 / 113 page ![]() TNETX3150/TNETX3150A ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 uplink TX pretagging (continued) Table 1. Source Port Number Codes SOURCE PORT NUMBER PORT 0000 Reserved 0001 Port 01 (10/100 Mbit/s) 0010 Port 02 (10/100 Mbit/s) 0011 Port 03 (10 Mbit/s) 0100 Port 04 (10 Mbit/s) 0101 Port 05 (10 Mbit/s) 0110 Port 06 (10 Mbit/s) 0111 Port 07 (10 Mbit/s) 1000 Port 08 (10 Mbit/s) 1001 Port 09 (10 Mbit/s) 1010 Port 10 (10 Mbit/s) 1011 Port 11 (10 Mbit/s) 1100 Port 12 (10 Mbit/s) 1101 Port 13 (10 Mbit/s) 1110 Port 14 (10 Mbit/s) 1111 Reserved Port 00, when operated at 100-Mbit/s (M00UPLINK = 1), provides a tag nibble one cycle before M00TXEN is asserted. A preamble is provided on this port when operated at 100 Mbit/s. The nibble format is shown in Table 1. uplink RX pretagging When port 00 (uplink) is operated in 200-Mbit/s mode, a pretag can be placed one cycle before MRXDV goes high for the frame. This pretag is not operated on internally by the TNETX3150/TNETX3150A. The tag is passed to the DRAM interface, where it appears on bits 31–28 of the forward pointer of the buffer transfer for the frame received on the uplink. Tag data that is applied to M00RXD0–M00RXD3 is passed, and tag data that is applied on M00RXD4–M00RXD7 is ignored. This allows an upstream device, connected to the uplink, to pass information through the TNETX3150/TNETX3150A to the DRAM bus where an external lookup device can operate on that information. It also enables two ThunderSWITCH devices, when cascaded, to pass frame-source port information from the receiving TNETX3150/TNETX3150A to the cascaded external address-lookup devices. See Figure 6. The pretag is qualified with the channel number of the port that received the frame. Only pretags for frames whose port number is 00 are valid. For frames that are not received on the uplink (port 00), the pretag is zero. A pretag received on the uplink (port 00) is retained for the duration of the frame. |
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