TNETX3150 datasheet(14/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Terminal Functions (Continued)

DRAM interface (continued)

TERMINAL

I/O

DESCRIPTION

NAME†

NO.

I/O

DESCRIPTION

DD26

R23

DD27

R24

DD28

R25

DD29

R26

DD30

T23

I/O

DRAM data bus DD00 DD35 is bidirectional

DD31

T24

I/O

DRAM data bus. DD00–DD35 is bidirectional.

DD32

T25

DD33

T26

DD34

U24

DD35

U25

DOE

F24

DRAM output enable. DOE is the DRAM output-enable command.

DWE

F25

DRAM write enable. DWE is the DRAM read/write command.

† DD00 is the least-significant bit.

external address match (EAM) interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

EAM15

(mode select)

AD21

External address match. When EAM15 is high and EAM04 is low, it indicates that the least-significant

nibble EAM03–EAM00 contains a routing code for the single-selected port.

EAM00

AB26

EAM01

AB24

EAM02

AB23

EAM03

AC26

EAM04

AC25

EAM05

AC24

EAM06

AD26

External address match. When EAM15 is low, a high on EAMXX (XX = 14–0) indicates the data frame

EAM07

AF24

)

is transmitted from that single-selected port.

EAM08

AD23

EAM00 is the least-significant bit and is associated with port 00.

EAM09

AE23

EAM10

AF23

EAM11

AC22

EAM12

AD22

EAM13

AF22

EAM14

AC21

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