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TNETX3150 数据表(PDF) 71 Page - Texas Instruments

部件名 TNETX3150
功能描述  ThunderSWITCHE 15-PORT 10-/100-MBIT/S ETHERNETE SWITCH
PDF  113 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETX3150 数据表(HTML) 71 Page - Texas Instruments

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TNETX3150/TNETX3150A
ThunderSWITCH15-PORT 10-/100-MBIT/S ETHERNETSWITCH
SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997
71
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
address compare unit (continued)
MUX
Address Register
Compare
Encoder
Matched Address Signal
Load Register
Ethernet Address
48 Bits
Address Match Bus
Destination Channel Address
Figure 29. Address Compare Logic
port address register configuration
The port addresses can be assigned explicitly or dynamically. An address is explicitly assigned by writing it to
the port address registers via the DIO interface. An address is assigned dynamically by the
TNETX3150/TNETX3150A hardware, loading the register from the source address field of the received frames.
If the port is in secured mode, the address is loaded only once from the first frame. In unsecured mode, the
address is updated on every frame received.
The uplink port (port 00) does not have a port address register. If it receives a frame with a source address
securely assigned to another port, the uplink either disables or continues to operate, depending on the SECDIS
bit. When SECDIS is set, the port disables on receipt of a securely assigned address. When SECDIS is reset,
the port continues to operate. Port suspension, due to address mismatch, is not supported on the uplink. Since
no port address exists, suspension on a multiple-address port is not desirable.
IOB operation
This mode of handling broadcast traffic is selected by setting the IOBMOD bit in the system control register. IOB
handling ensures that frames that are broadcast follow the strict order in which they were received.
When a multicast frame is detected in IOB mode, the reception continues in the same manner as for a normal
store-and-forward frame. The buffers comprising the frame are linked in the receive queue.
When the end of frame is detected, an additional buffer is linked to the end of the receive queue. This buffer
is similar in size to a normal data buffer, but contains indexed queue information rather than frame data. To
distinguish between the types of buffers, bit 23 of the tag field is set.



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