TNETX3150 datasheet(65/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

FIFO (continued)

On data reception, when a FIFO buffer becomes full, the buffer is archived to the DRAM while the next buffer

is received. Fast page access of the external DRAM enables efficient transfer. The queue manager uses the

pointer from the working register to archive the buffer to external buffer memory. The working register value is

then replaced by the next pointer in the free buffer stack. When all the pointers in the free buffer stack are used,

the free queue register is loaded on demand with buffers from the free buffer queue.

If the FIFO becomes full and the external buffer memory also is full, subsequent frame data is lost and an error

is logged. If this condition occurs, the health of the network at large is questionable (more data is entering than

can leave the TNETX3150/TNETX3150A over a sustained period and the buffer depth is insufficient, resulting

in storage overflow).

Diagrams showing the flow of normal frame data through the FIFO and the queue management unit (QMU) are

shown in Figures 25 and 26.

QMU

The QMU comprises a number of tasks. At the top level, it provides an interface between the DRAM buffer

memory and the on-chip FIFO. The queue manager uses internal 64-bit memory to maintain the status of all

the queues. There are three queues associated with each port: The receive queue and transmit queue for

store-and-forward operation, and the immediate queue for cut-through operation.

port structures

Internal registers are used to maintain the status of all the queues in external buffer memory. The internal

QUEUE STRUCTURE WORD FORMAT

HEAD POINTER

TAIL POINTER

LENGTH

Figure 24. Queue Structure Word Format

The head pointer (bits 63–40) records the starting address of the queue in the buffer memory. The tail pointer

(bits 39–16) records the last (or the tail) address of the queue. The TX length field (bits 15–0) is a residual length

indicator and provides an indication of how many buffers are available to the queue. The number of buffers

allocated to a queue at initialization depends on the size and configuration of the buffer memory. This can be

stored in the EEPROM interface or written directly to the registers. For RX, the length recorded is the absolute

number of buffers queued.

There are three queue types used by the TNETX3150/TNETX3150A per port:

D The receive queue collates buffer data for frames that cannot be cut-through to the destination port. All the

frame data to be switched is collated on the appropriate receive queue. It is then concatenated to the end

of the destination transmit queue. Concatenation entails the head pointer of the receive queue being placed

in the forward pointer of the last buffer in the transmit queue. The length of the receive queue (number of

buffers used) is subtracted from the number of free transmit queue buffers available. The tail pointer of the

receive data becomes the new tail pointer for the transmit queue (there is one receive queue for every

channel). If the destination port becomes idle and the frame (collated on the receive queue) can be

cut-through, the receive queue is written to the immediate queue for transmission.

D The transmit queue stores complete frames that are ready for transmission. Once placed on the

transmission queue, the data is transmitted. The transmit queues are not stalled pending the completion

of receive data. The queues are stalled only if transmission cannot occur. There is one transmit queue for

every channel.

TNETX3150 数据表(PDF) 65 Page - Texas Instruments

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