TNETX3150 datasheet(37/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

DIO interface

The DIO interface allows host access to the TNETX3150/TNETX3150A. The DIO interface provides access to

the on-chip registers and statistics.

Information that DIO provides for access follows:

D Network statistics counters – provides access to the network statistics information compiled in the statistics

RAM

D System configuration registers – to set or change the operation of the TNETX3150/TNETX3150A

D RAM access – to permit test access, allowing functional testing

D Port registers – to access port control, port status, and port address registers, permitting port management

and status interrogation

A byte-wide asynchronous interface is defined to reduce design overheads and to simplify interfacing logic.

Access

the

internal

TNETX3150/TNETX3150A

registers

available,

indirectly,

via

the

TNETX3150/TNETX3150A host registers (see

host registers for more detail).

The four host registers are addressed directly from DIO interface address lines SAD1 and SAD0 (see Table 7).

Table 7. SAD1/SAD0 Address Lines

SAD1

SAD0

DESCRIPTION

DIO address low

DIO address high

DIO data

DIO data increment

Data can be read from or written to the address registers using the data lines SDATA7–SDATA0 under the

control of chip select (SCS), read not write (SRNW), and ready (SRDY) signals. The DIO interface is shown in

Figure 15. The DIO interface timing is shown in Figures 39 and 40.

SAD1–SAD0

SDATA7–SDATA0

SCS

SRNW

SRDY

TNETX3150/TNETX3150A

Host

Figure 15. DIO Interface Signals

remote hardware reset

A hardware reset can be initiated by the DIO interface, permitting remote recovery of the

TNETX3150/TNETX3150A, without requiring external glue logic to decode a DIO address and toggle the

external reset signal of the TNETX3150/TNETX3150A. A hard DIO reset is instigated by writing 0x40000 to the

DIO

address

high

(SAD1=0,

SAD0=0).

This

address

directly

decoded

the

TNETX3150/TNETX3150A and forces a hardware reset.

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