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TNETX3150 数据表(PDF) 60 Page - Texas Instruments

部件名 TNETX3150
功能描述  ThunderSWITCHE 15-PORT 10-/100-MBIT/S ETHERNETE SWITCH
PDF  113 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETX3150 数据表(HTML) 60 Page - Texas Instruments

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TNETX3150/TNETX3150A
ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH
SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997
60
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
write cycle timing (continued)
When accessing the EEPROM through the DIO interface, the ECLOK and EDATA bits (SIOL/CTRL
register at 0x00A1) are a direct reflection of the ECLK and EDIO terminals, respectively. To read and write to
the EEPROM, these bits must be toggled properly to provide the proper requests and data.
A typical write operation is shown in Figure 20.
S
P
S
t
o
p
Data
S
t
a
r
t
Word Address
Slave Address
EDIO
DIO
Interface
24C02
A
c
k
A
c
k
A
c
k
S
P
S
t
o
p
Data n + 15
S
t
a
r
t
Word Address (n)
Slave Address
EDIO
DIO
Interface
24C02
A
c
k
A
c
k
A
c
k
A
c
k
Data n + 1
Data n
a) Byte Write
b) Page Write
0
0
0
0
0
0
Figure 20. Typical Write Operation
read cycle timing
Read operations are initiated in the same manner as write operations, with the exception that the R/W bit of the
slave address is set to a 1. There are three basic read operations: current address read, random read, and
sequential read.
Typical read operations are shown in Figure 21.



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