TNETX3150 datasheet(98/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

DIO read cycle

D The TNETX3150/TNETX3150A host-register address data is placed on address terminals SAD1–SAD0

and SRNW is held high.

D After setup time, SCS is taken low, initiating the read cycle.

D After delay following SCS low, SDATA7–SDATA0 is released from the Z state.

D After delay following SCS low, SDATA7–SDATA0 is driven with valid data and SRDY is pulled low. The host

can access the data.

D SCS is taken high by the host upon completion of the cycle, causing SRDY to be deasserted and SRDY

is driven high for one clock cycle before being placed in the Z state. SDATA7–SDATA0 is also placed in the

Z state.

timing requirements over recommended operating conditions (see Note 12 and Figure 40)

read cycle DIO interface

TNETX3150

TNETX3150A

UNIT

NO.

MIN

MAX

MIN

MAX

UNIT

tw(SCS)

Pulse duration, SCS low

tsu(SAD)

Setup time, SAD1–SAD0 valid before SCS

↓

tsu(SRNW)

Setup time, SRNW high before SCS

↓

NOTE 12: SRDY should be held high using an external pullup resistor to ensure correct system operation.

TNETX3150 数据表(PDF) 98 Page - Texas Instruments

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