TNETX3150 datasheet(70/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

QMU – DRAM controller (continued)

The address lines are arranged to permit a wide range of memory sizes to be connected to a maximum of 22

address lines. The address lines are organized as shown in Table 13.

Table 13. Address-Line Organization

TERMINAL NAME

DX2

DX1

DX0

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

Address bit valid during DRAS

Address bit valid during DCAS

This prohibits the alignment of buffers to cross a page boundary, reducing buffer management complexity and

maintaining a high bandwidth.

address compare unit

The address compare unit provides the switching information required to route the data packets. The source

and destination Ethernet addresses are examined. Source addresses are used to determine the port’s address.

Destination addresses are used to determine the packet destination. If a match is found, the appropriate

destination channel address is generated and provided to the other internal components.

Each channel (except the uplink port) has an address compare register (see Figure 29). Each register holds

a 48-bit Ethernet address. The Ethernet source address is taken from a received frame and assigned to the

channel on which it was received. This occurs for each frame received. The destination address is compared

to the address registers. If matched, the channel address for the port is assigned. If no match is found for the

destination address, the frame is handled according to the ADRDIS and BRUN option bits. If BRUN (broadcast

to unassigned) is set, an unmatched frame is broadcast to all ports with unassigned addresses (requires

IOBMOD bit to be set). If BRUN is reset, the frame is handled according to the ADRDIS bit for the uplink (port

00). If the ADRDIS bit for port 00 is set, the unmatched frame is discarded. If reset, the unmatched frame is

transmitted from the uplink.

The address compare registers learn their Ethernet address, used for comparison, from the source address of

a received frame. The port address registers can be fully accessed via the DIO interface. This allows ports to

be set up and secured under management control, or port address monitored. For further details, see the

description of the TNETX3150/TNETX3150A registers.

As the frame is loaded the source address is compared against the source address attributed to that port. If the

address has changed and the port address acquired by the TNETX3150/TNETX3150A was secured, the port

may be suspended or disabled and an error logged. During this comparison, it is possible to detect multiple

entries of the same address in the compare unit. This also is an error, and it is meaningless to have the same

address applied to multiple ports.

If external address matching logic is not used, ports (1–14) must be confined to desktop (single address) and

not multiple-address switching. The uplink (port 00) supports multiple-address switching.

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