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TNETX3150 数据表(PDF) 27 Page - Texas Instruments |
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TNETX3150 数据表(HTML) 27 Page - Texas Instruments |
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27 / 113 page  TNETX3150/TNETX3150A ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 uplink frame RX routing via post tagging (continued) tag 0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Destination Port 08 10 Mbit/s Destination Port 07 10 Mbit/s Destination Port 06 10 Mbit/s Destination Port 05 10 Mbit/s Destination Port 04 10 Mbit/s Destination Port 03 10 Mbit/s Destination Port 02 10/100 Mbit/s Destination Port 01 10/100 Mbit/s tag 1 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Reserved Destination Port 14 10 Mbit/s Destination Port 13 10 Mbit/s Destination Port 12 10 Mbit/s Destination Port 11 10 Mbit/s Destination Port 10 10 Mbit/s Destination Port 09 10 Mbit/s tag 2 BIT 7 BIT 0 Reserved tag 3 BIT 7 BIT 0 Reserved Figure 9. Tag-Field Coding If only one bit is set in the destination port field, the packet is sent to a single port. For example, with tag 0 = 00000000 and tag 1 = xx000100, the packet is unicast and destined for port 11. If more than one bit is set, the packet is sent to multiple ports. For example, with tag 0 = 11001010 and tag 1 = xx001001, the packet is transmitted from ports 12, 09, 08, 07, 04, and 02. This allows broadcast and multicast traffic to be limited in supporting external VLANs. If all bits are clear in the tags, the packet is invalid and is discarded. NOTE: The four tag fields do not immediately follow the frame data, but are presented after the end of data (following an idle period), and require that M00RXDVX = 1 and M00RXDV = 1. uplink flow control Flow control is available only on the uplink port and is applicable in full-duplex mode only. In this mode, asserting the collision signal before the TNETX3150/TNETX3150A begins the transmission of a frame forces the TNETX3150/TNETX3150A to wait for the collision signal to be deasserted before the frame is transmitted. The collision pin is sampled immediately before transmission. If it is not asserted, frame transmission continues. If the collision signal is asserted after transmission, the current frame continues to be transmitted. The TNETX3150/TNETX3150A delays all future-frame transmissions until the collision signal is deasserted. The interfacing hardware must be capable of storing up to a maximum-length Ethernet frame to prevent dropping frames due to congestion. The frame is transmitted immediately following the deassertion of the collision signal. The flow-control-requesting device must be ready to accept data when the collision signal is deasserted following a flow-controlled frame. No interframe gap is imposed by the TNETX3150/TNETX3150A in this mode of operation. This provides maximum flexibility and control to the interfacing hardware on the uplink. |
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