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TNETX3150 数据表(PDF) 25 Page - Texas Instruments |
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TNETX3150 数据表(HTML) 25 Page - Texas Instruments |
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25 / 113 page  TNETX3150/TNETX3150A ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 uplink RX pretagging (continued) M00RCLK M00RXDVX M00RXDV Tag DA, SA, Data, CRC Pretag Nibble Ethernet Frame M00RXD7–M00RXD0 Figure 6. Data Format for Uplink RX Frames With Pretag cascade connection In uplink mode, the TNETX3150/TNETX3150A can route uplink frames by employing the EAM or internal address registers. To allow this, the TAGOFF bit (bit 4 of RSIZE register 0x00C2) must be set. When set, the TNETX3150/TNETX3150A does not require a post frame tag for frame-routing information. It routes the frame according to the destination address. This permits the following: D The TNETX3150/TNETX3150A can be cascaded with a second TNETX3150/TNETX3150A device to permit larger port configurations to be supported with minimal additional hardware. D The separate TNETX3150/TNETX3150A devices can use either single-address-per-port capability, or with an external address-lookup device, provide network-address-support capability. D Additional logic can be used in the interface to implement more sophisticated flow control on the uplink. D Using EEPROM devices to provide initialization data, the devices can be used with or without a management CPU, presenting a low-cost switching solution. A cascade connection is shown in Figure 7. M00TCLK M00TXER M00RCLK M00RXDVX M00DUPLEX M00TXD7–M00TXD0 M00TXEN M00COL M00CRS M00RXD7–M00RXD0 M00RXDV M00RXER M00SPEED M00PROTOCOL M00LINK M00UPLINK M00RXER M00RXDVX M00RXDV M00RXD7–M00RXD0 M00RCLK M00CRS M00COL M00TXER M00TXEN M00TXD7–M00TXD0 M00TCLK M00DUPLEX M00SPEED M00PROTOCOL M00LINK M00UPLINK TNETX3150/ TNETX3150A No.1 TNETX3150/ TNETX3150A No.2 VCC(5V) TXD(0) TXD(0) Q Q Toggle Flip-Flop OSCIN (50 MHz) Gnd Figure 7. TNETX3150/TNETX3150A Cascade Connection |
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