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TNETV1644ZDU6 数据表(PDF) 26 Page - Texas Instruments |
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TNETV1644ZDU6 数据表(HTML) 26 Page - Texas Instruments |
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26 / 306 page  TMS320DM6437 Digital Media Processor SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Table 2-5. BOOT Terminal Functions SIGNAL TYPE(1) OTHER(2)(3) DESCRIPTION ZWT ZDU NAME NO. NO. BOOT YOUT3/GP[25]/ (BOOTMODE3) G16 H21 Bootmode configuration bits. These bootmode functions along with YOUT2/GP[24]/ the FASTBOOT function determine what device bootmode (BOOTMODE2) G15 L20 IPD configuration is selected. I/O/Z DVDD33 The DM6437 device supports several types of bootmodes along with YOUT1/GP[23]/ F15 K20 a FASTBOOT option; for more details on the types/options, see (BOOTMODE1) F18 J20 Section 3.4.1, Boot Modes. YOUT0/GP[22]/ (BOOTMODE0) Fast Boot YOUT4/GP26]/ IPD G17 K19 I/O/Z 0 = Not Fast Boot (FASTBOOT) DVDD33 1 = Fast Boot R0/EM_A[4]/ EMIFA Address Bus Width (AEAW) and Fast Boot PLL Multiplier IPD GP[10]/ A17 B21 I/O/Z Select (PLLMS). DVDD33 (AEAW2/PLLMS2) These configuration pins serve two purposes which are based on AEM[2:0] settings. G1/EM_A[1]/ IPD For AEM[2:0] = 001 [8-bit EMIFA (Async) Pinout Mode 1], the (ALE)/GP[9]/ A16 B20 I/O/Z DVDD33 AEAW/PLLMS pins serve as the AEAW function to select EMIFA (AEAW1/PLLMS1) Address Bus Width. For all other AEM modes, the AEAW/PLLMS pins select the PLL B1/EM_A[2]/ IPD multiplier for fast boot. (CLE)/GP[8]/ B16 A20 I/O/Z DVDD33 For more details, see Section 3.5.1.2, EMIFA Address Width Select (AEAW0/PLLMS0) (AEAW) and Fast Boot PLL Multipler Select (PLLMS). R1/EM_A[0]/ IPD Selects EMIFA Pinout Mode B17 C21 I/O/Z GP[7]/(AEM2) DVDD33 The DM6437 supports the following EMIFA Pinout Modes: R2/EM_BA[0]/ IPD C17 E20 I/O/Z AEM[2:0] = 000, No EMIFA GP[6]/(AEM1) DVDD33 AEM[2:0] = 001, 8-bit EMIFA (Async) Pinout Mode 1 AEM[2:0] = 011, 8-bit EMIFA (Async) Pinout Mode 3 AEM[2:0] = 100, 8-bit EMIFA (NAND) Pinout Mode 4 B2/EM_BA[1]/ IPD AEM[2:0] = 101, 8-bit EMIFA (NAND) Pinout Mode 5 C16 C20 I/O/Z GP[5]/(AEM0) DVDD33 This signal doesn't actually affect the EMIFA module. It only affects how the EMIFA is pinned out. For proper DM6437 device operation, if this pin is both routed and 3-stated (not driven) during device reset, it must be pulled down via YOUT6/ IPD H16 J21 I/O/Z an external resistor. For more detailed information on GP[28] DVDD33 pullup/pulldown resistors, see Section 3.9.1, Pullup/Pulldown Resistors. PCI Enable IPD PCIEN T3 W3 I 0 = PCI pin function is disabled [default] DVDD33 1 = PCI pin function is enabled For proper DM6437 device operation, if this pin is both routed and IPU 3-stated (not driven) during device reset, it must be pulled up via an YOUT5/GP[27] H17 L19 I/O/Z DVDD33 external resistor. For more detailed information on pullup/pulldown resistors, see Section 3.9.1, Pullup/Pulldown Resistors. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal Device Overview 26 Submit Documentation Feedback |
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