TNETV1644ZDU6 datasheet(62/306 Pages) TI1

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TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Table 2-27. PWM0, PWM1, and PWM2 Terminal Functions

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

ZWT

ZDU

NAME

NO.

PWM2

This pin is multiplexed between the System Clock generator (PLL1),

CLKOUT0/PWM2/

IPD

I/O/Z

PWM2, and GPIO.

GP[84]

DVDD33

For PWM2, this pin is output PWM2.

PWM1

IPD

This pin is multiplexed between GPIO and PWM1.

GP[4]/PWM1

I/O/Z

DVDD33

For PWM1, this pin is output PWM1.

PWM0

This pin is multiplexed between the UART0 (Flow Control), PWM0,

URTS0/PWM0/

IPU

I/O/Z

and GPIO.

GP[88]

DVDD33

For PWM0, this pin is output PWM0.

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal

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