| 数据搜索系统,热门电子元器件搜索 |
|
TNETV1644ZDU6 数据表(PDF) 91 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TNETV1644ZDU6 数据表(HTML) 91 Page - Texas Instruments |
|
91 / 306 page ![]() 3.4.2.3 DSPBOOTADDR Register TMS320DM6437 Digital Media Processor www.ti.com SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 The DSP Boot Address (DSPBOOTADDR) register contains the starting address for the C64x+ CPU. Whenever the C64x+ is released from reset, it begins executing from the location pointed to by DSPBOOTADDR register. For Host boots (PCI Boot or HPI boot), the DSPBOOTADDR register is also used for communication between the Host and the bootloader code during boot. The DSPBOOTADDR register is reset by any device-level global reset. For the list of device-level global resets, see Section 6.5, Reset. 31 0 DSPBOOTADDR R/W-0x0010 0000 or 0x4200 00000 LEGEND: R = Read; W = Write; -n = value after reset Figure 3-5. DSPBOOTADDR Register— 0x01C4 0008 Table 3-11. DSPBOOTADDR Register Description Bit Field Name Description DSP Boot Address After boot, the C64x+ CPU begins execution from this 32-bit address location. The lower 10 bits (bits 9:0) should always be programmed to "0" as they are ignored by the C64x+. The default value of the DSPBOOTADDR depends on the boot mode selected. 31:0 DSPBOOTADDR The DSPBOOTADDR defaults to 0x0010 0000 when the Internal Bootloader ROM is used. or The DSPBOOTADDR defaults to 0x4200 0000 when EMIFA CS2 Space is used. For the boot mode selections, see Table 3-5, Non-Fastboot Modes; Table 3-6, Fixed-Multiplier Fastboot Modes; and Table 3-7, User-Select Multiplier Fastboot Modes. For Non-Host Boot Modes, software can leave the DSPBOOTADDR register at default. For Host Boots (PCI Boot or HPI boot), the DSPBOOTADDR register is also used for communication between the Host and the bootloader code during boot. For Host Boots, the DSPBOOTADDR register defaults to Internal Bootloader ROM, and the C64x+ CPU is immediately released from reset so that it can begin executing the bootloader code in this internal ROM. The bootloader code waits for the Host to boot the device. Once the Host is done booting the device, it must write a new starting address into the DSPBOOTADDR register, and follow with writing BOOTCMPLT.BC = 1 to indicate the boot is complete. As soon as the bootloader code detects BOOTCMPLT.BC = 1, it instructs the CPU to jump to this new DSPBOOTADDR address. At this point, the CPU continues the rest of the code execution starting from the new DSPBOOTADDR location and the boot is completed. Submit Documentation Feedback Device Configurations 91 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |