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SPC560P34L1 数据表(PDF) 57 Page - STMicroelectronics |
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SPC560P34L1 数据表(HTML) 57 Page - STMicroelectronics |
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57 / 103 page ![]() SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 Electrical characteristics Doc ID 16100 Rev 7 57/103 3.8.2 Voltage monitor electrical characteristics The device implements a power on reset module to ensure correct power-up initialization, as well as three low voltage detectors to monitor the VDD and the VDD_LV voltage while device is supplied: ● POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state ● LVDHV3 monitors VDD to ensure device reset below minimum functional supply ● LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range ● LVDLVCOR monitors low voltage digital power domain 3.9 Power up/down sequencing To prevent an overstress event or a malfunction within and outside the device, the SPC560P34/SPC560P40 implements the following sequence to ensure each module is started only when all conditions for switching it ON are available: ● A POWER_ON module working on voltage regulator supply controls the correct start- up of the regulator. This is a key module ensuring safe configuration for all voltage regulator functionality when supply is below 1.5 V. Associated POWER_ON (or POR) signal is active low. ● Several low voltage detectors, working on voltage regulator supply monitor the voltage of the critical modules (voltage regulator, I/Os, flash memory and low voltage domain). LVDs are gated low when POWER_ON is active. ● A POWER_OK signal is generated when all critical supplies monitored by the LVD are available. This signal is active high and released to all modules including I/Os, flash Table 17. Low voltage monitor electrical characteristics Symbol C Parameter Conditions(1) Value Unit Min Max VPORH T Power-on reset threshold — 1.5 2.7 V VPORUP P Supply for functional POR module TA = 25 °C 1.0 — V VREGLVDMOK_H P Regulator low voltage detector high threshold — — 2.95 V VREGLVDMOK_L P Regulator low voltage detector low threshold — 2.6 — V VFLLVDMOK_H P Flash low voltage detector high threshold — — 2.95 V VFLLVDMOK_L P Flash low voltage detector low threshold — 2.6 — V VIOLVDMOK_H P I/O low voltage detector high threshold — — 2.95 V VIOLVDMOK_L P I/O low voltage detector low threshold — 2.6 — V VIOLVDM5OK_H P I/O 5 V low voltage detector high threshold — — 4.4 V VIOLVDM5OK_L P I/O 5 V low voltage detector low threshold — 3.8 — V VMLVDDOK_H P Digital supply low voltage detector high — — 1.145 V VMLVDDOK_L P Digital supply low voltage detector low — 1.08 — V 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 °C to TA MAX, unless otherwise specified |
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