SPC560P34L1 datasheet(63/103 Pages) STMICROELECTRONICS

63 / 103 page

SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3

Electrical characteristics

Doc ID 16100 Rev 7

63/103

3.10.4

Input DC electrical characteristics definition

Figure 14 shows the DC electrical characteristics behavior as function of time.

Figure 14.

Input DC electrical characteristics definition

Table 22.

Supply current (3.3 V, NVUSRO[PAD3V5V] = 1)

Symbol

Parameter

Conditions

Value(1)

Unit

Typ

Max

IDD_LV_CORx

RUN—Maximum mode(2)

VDD_LV_CORx externally

forced at 1.3 V

40 MHz

64 MHz

RUN—Typical mode(3)

40 MHz

64 MHz

HALT mode(4)

—1.5

STOP mode(5)

—1

IDD_ADC

TADC

VDD_HV_ADC0 at 3.3 V

fADC =16MHz

ADC_0

IDD_OSC

Oscillator

VDD_HV_OSC at 3.3 V

8 MHz

2.6

3.2

IDD_HV_REG

Internal regulator module

current consumption

VDD_HV_REG at 5.5 V

—

All values to be confirmed after characterization/data collection.

Maximum mode: FlexPWM, ADC, CTU, DSPI, LINFlex, FlexCAN, 15 output pins, PLL_0 enabled, 125 °C ambient. I/O

supply current excluded.

Typical mode configurations: DSPI, LINFlex, FlexCAN, 15 output pins, PLL_0, 105 °C ambient. I/O supply current

excluded.

Halt mode configurations: Code fetched from SRAM, code flash memory and data flash memory in low power mode,

OSC/PLL_0 are OFF, core clock frozen, all peripherals disabled.

STOP “P” mode Device Under Test (DUT) configuration: Code fetched from SRAM, code flash memory and data flash

memory off, OSC/PLL_0 are OFF, core clock frozen, all peripherals disabled.

VIL

VIN

VIH

PDIx = ‘1’

VDD

VHYS

(GPDI register of SIUL)

PDIx = ‘0’

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