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SPC560P34L1 数据表(PDF) 74 Page - STMicroelectronics |
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SPC560P34L1 数据表(HTML) 74 Page - STMicroelectronics |
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74 / 103 page  Electrical characteristics SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 74/103 Doc ID 16100 Rev 7 3.15 Flash memory electrical characteristics 3.15.1 Program/Erase characteristics 4. During the sampling time the input capacitance CS can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within ts. After the end of the sampling time ts, changes of the analog input voltage have no effect on the conversion result. Values for the sample clock ts depend on programming. 5. This parameter includes the sampling time ts. 6. 20 MHz ADC clock. Specific prescaler is programmed on MC_PLL_CLK to provide 20 MHz clock to the ADC. 7. See Figure 16. Table 31. Program and erase specifications Symbol C Parameter Value Unit Min Typ(1) Initial Max(2) Max(3) Twprogram P Word Program Time for data flash memory(4) — 30 70 500 µs Tdwprogram P Double Word Program Time for code flash memory (4) — 22 50 500 µs TBKPRG P Bank Program (256 KB)(4)(5) — 0.73 0.83 17.5 s P Bank Program (64 KB)(4)(5) —0.49 1.2 4.1 s T16kpperase P 16 KB Block Pre-program and Erase Time for code flash memory — 300 500 5000 ms 16 KB Block Pre-program and Erase Time for data flash memory — 700 800 5000 T32kpperase P 32 KB Block Pre-program and Erase Time — 400 600 5000 ms T128kpperase P 128 KB Block Pre-program and Erase Time — 800 1300 7500 ms tESRT P Program and erase specifications(6) 10 — — — ms 1. Typical program and erase times assume nominal supply values and operation at 25 °C. All times are subject to change pending device characterization. 2. Initial factory condition: < 100 program/erase cycles, 25 °C, typical supply voltage. 3. The maximum program and erase times occur after the specified number of program/erase cycles. These maximum values are characterized but not guaranteed. 4. Actual hardware programming times. This does not include software overhead. 5. Typical Bank programming time assumes that all cells are programmed in a single pulse. In reality some cells will require more than one pulse, adding a small overhead to total bank programming time (see “Initial Max” column). 6. Time between erase suspend resume and next erase suspend request. |
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