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SPC560P34L1 数据表(PDF) 18 Page - STMicroelectronics |
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SPC560P34L1 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 103 page ![]() Introduction SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 18/103 Doc ID 16100 Rev 7 The RC oscillator provides these features: ● Nominal frequency 16 MHz ● ±5% variation over voltage and temperature after process trim ● Clock output of the RC oscillator serves as system clock source in case loss of lock or loss of clock is detected by the PLL ● RC oscillator is used as the default system clock during startup 1.5.12 Periodic interrupt timer (PIT) The PIT module implements these features: ● 4 general-purpose interrupt timers ● 32-bit counter resolution ● Clocked by system clock frequency ● Each channel usable as trigger for a DMA request 1.5.13 System timer module (STM) The STM implements these features: ● One 32-bit up counter with 8-bit prescaler ● Four 32-bit compare channels ● Independent interrupt source for each channel ● Counter can be stopped in debug mode 1.5.14 Software watchdog timer (SWT) The SWT has the following features: ● 32-bit time-out register to set the time-out period ● Programmable selection of window mode or regular servicing ● Programmable selection of reset or interrupt on an initial time-out ● Master access protection ● Hard and soft configuration lock bits ● Reset configuration inputs allow timer to be enabled out of reset 1.5.15 Fault collection unit (FCU) The FCU provides an independent fault reporting mechanism even if the CPU is malfunctioning. The FCU module has the following features: ● FCU status register reporting the device status ● Continuous monitoring of critical fault signals ● User selection of critical signals from different fault sources inside the device ● Critical fault events trigger 2 external pins (user selected signal protocol) that can be used externally to reset the device and/or other circuitry (for example, a safety relay) ● Faults are latched into a register |
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