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SPC560P34L1 数据表(PDF) 16 Page - STMicroelectronics |
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SPC560P34L1 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 103 page ![]() Introduction SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 16/103 Doc ID 16100 Rev 7 1.5.6 Interrupt controller (INTC) The interrupt controller (INTC) provides priority-based preemptive scheduling of interrupt requests, suitable for statically scheduled hard real-time systems. The INTC handles 128 selectable-priority interrupt sources. For high-priority interrupt requests, the time from the assertion of the interrupt request by the peripheral to the execution of the interrupt service routine (ISR) by the processor has been minimized. The INTC provides a unique vector for each interrupt request source for quick determination of which ISR has to be executed. It also provides a wide number of priorities so that lower priority ISRs do not delay the execution of higher priority ISRs. To allow the appropriate priorities for each source of interrupt request, the priority of each interrupt request is software configurable. When multiple tasks share a resource, coherent accesses to that resource need to be supported. The INTC supports the priority ceiling protocol (PCP) for coherent accesses. By providing a modifiable priority mask, the priority can be raised temporarily so that all tasks which share the same resource can not preempt each other. The INTC provides the following features: ● Unique 9-bit vector for each separate interrupt source ● 8 software triggerable interrupt sources ● 16 priority levels with fixed hardware arbitration within priority levels for each interrupt source ● Ability to modify the ISR or task priority: modifying the priority can be used to implement the priority ceiling protocol for accessing shared resources. ● 1 external high priority interrupt (NMI) directly accessing the main core and I/O processor (IOP) critical interrupt mechanism 1.5.7 System status and configuration module (SSCM) The system status and configuration module (SSCM) provides central device functionality. The SSCM includes these features: ● System configuration and status – Memory sizes/status – Device mode and security status – Determine boot vector – Search code flash for bootable sector –DMA status ● Debug status port enable and selection ● Bus and peripheral abort enable/disable |
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