EDB8164B4PR-1DITF-R datasheet(115/152 Pages) MICRON

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specified limitations for overshoot and undershoot (see Overshoot and Undershoot Defi-

nition).

2. For CK_t and CK_c, use VSEH/VSEL(AC) of CA; for strobes (DQS[3:0]_t and DQS[3:0]_c), use

VIH/VIL(AC) of DQ.

3. VIH(AC) and VIL(AC) for DQ are based on VREFDQ; VSEH(AC) and VSEL(AC) for CA are based on

VREFCA. If a reduced AC HIGH or AC LOW is used for a signal group, the reduced level

applies.

Differential Input Crosspoint Voltage

To ensure tight setup and hold times as well as output skew parameters with respect to

clock and strobe, each crosspoint voltage of differential input signals (CK_t, CK_c,

DQS_t, and DQS_c) must meet the specifications listed in the Single-Ended Levels for

CK_t, CK_c, DQS_t, DQS_c table. The differential input crosspoint voltage (VIX) is meas-

ured from the actual crosspoint of the true signal and its and complement to the midle-

vel between VDD and VSS.

Figure 74: VIX Definition

Table 74: Crosspoint Voltage for Differential Input Signals (CK_t, CK_c, DQS_t, DQS_c)

Symbol

Parameter

LPDDR2-1066 to LPDDR2-200

Unit

Notes

Min

Max

VIXCA(AC)

Differential input crosspoint voltage rela-

tive to VDD2/2 for CK_t and CK_c

–120

120

1, 2

VIXDQ(AC)

Differential input crosspoint voltage rela-

tive to VDDQ/2 for DQS_t and DQS_c

–120

120

1, 2

Notes:

1. The typical value of VIX(AC) is expected to be about 0.5 × VDD of the transmitting device,

and it is expected to track variations in VDD. VIX(AC) indicates the voltage at which differ-

ential input signals must cross.

2. For CK_t and CK_c, VREF = VREFCA(DC). For DQS_t and DQS_c, VREF = VREFDQ(DC).

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

AC and DC Logic Input Measurement Levels for Differential

Signals

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

115

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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